crwdns2933803:06crwdne2933803:0
crwdns2933797:0drwreckcrwdnd2933797:0crwdne2933797:0
- crwdns2933769:0crwdne2933769:0
- crwdns2933771:0crwdne2933771:0
- crwdns2933801:0crwdne2933801:0
crwdns2933807:0crwdne2933807:0
| + | [* black] There are two main PCBs housing most of the components. The main PCB is shown at left, while the “Chin” PCB is shown on step 9. |
|---|---|
| + | [* black] The NAND Flash + DDR SDRAM is handled by a Samsung MCP. |
| + | [* black] SMSC provides the USB PHY handling the connection from the processor to the PC. |
crwdns2933777:01crwdne2933777:0
crwdns2933779:0crwdne2933779:0
crwdns2915182:0crwdne2915182:0