It's an OTP bit in their secure SoC. Unable to reset without a very precise gamma strike into the SoC silicon structure.
The tamper trigger is a set of logic gates - tamper contacts reversed and then ANDed with a precise reference voltage input. This way the tamper triggers also when voltage is too low.
And yes, you are right it's a PCI DSS certification mandate - the card terminal needs to be permanently rendered useless once tampered with to prevent potential threats like bugging by deliberate malicious actors. (You need to know a bugged card terminal is not easily distinguishable, unlike skimming covers.)